A Mismatch-Immune 12-bit SAR ADC With Completely Reconfigurable Capacitor DAC
نویسندگان
چکیده
We overcome mismatch constraints of capacitor DAC design in SAR ADCs using a completely reconfigurable DAC with content addressable memory beneath groupings of unit capacitors. We demonstrate a linearity optimization technique in simulation and measurement. We achieve a nearly 2-bit repeatable ENOB improvement with a peak of 11.3 bits.
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